Here, Fabrice Derepas' website and fpga4fun.com give examples of VGA display. Basically, here is Fabrice's code (slighty modified) for handling VGA display :

   -- the clock here is a 25Mhz clock
   if (horizontal_counter >= "0010010000" ) -- 144
   and (horizontal_counter < "1100010000" ) -- 784
   and (vertical_counter >= "0000100111" ) -- 39
   and (vertical_counter < "1000000111" ) -- 519
   then
     -- pixel in screen range
     -- with X = horizontal_counter - 144
     -- and Y = vertical_counter - 39
   end if;
   if (horizontal_counter > "0000000000" )
     and (horizontal_counter < "0001100001" ) -- 96+1
   then
     hs_out <= '0';
   else
     hs_out <= '1';
   end if;
   if (vertical_counter > "0000000000" )
     and (vertical_counter < "0000000011" ) -- 2+1
   then
     vs_out <= '0';
   else
     vs_out <= '1';
   end if;
   horizontal_counter <= horizontal_counter+"0000000001";
   if (horizontal_counter="1100100000") then -- 800
     vertical_counter <= vertical_counter+"0000000001";
     horizontal_counter <= "0000000000";
   end if;
   if (vertical_counter="1000001001") then -- 521
     vertical_counter <= "0000000000";
   end if;

Let's take some time to understand these values... On many site you can find information on VGA timing. Here is an example of such a site : http://www.ece.odu.edu/~stough/ece489/vga_timi.html

An horizontal line of 640 dots is 25.17us (micro-seconds) long (the "D" delay), which means that a pixel "lasts" 25.17/640 = 0,039328125us. With our board, as we have a 50Mhz clock, we can easily generate a 25Mhz clock, which pulse lasts 0,04us, which is close enough to the ideal value.

With this basis, it's easy to calculate the others values. For instance, the "B" delay represents a count of 3.77 * 640 / 25.17 = 95,860... (roughly 96), and so on. I found some small differences in counter values on fpga4fun.com Verilog examples, but it doesn't really matter, both work.