Hard sector format

HxC Floppy emulator support for all others computers...
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snhirsch
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Re: Hard sector format

Post by snhirsch » Mon Jun 04, 2018 7:04 pm

Jeff wrote:
Mon Jun 04, 2018 2:15 pm
a new try :

http://hxc2001.com/vrac/HS/HxCUSBFE6.UPD

(can you try 1.hfe as well 6.hfe with this firmware ?)
Overall, 1.hfe I think is working better. That is what these results are based on:

Fast-step scan: No failures in five attempts
Fast-step file copy: Very bad. Several NO INDEX PULSE errors on each file. Gave up after first run.

Slow-step scan: One NO INDEX PULSE in five attempts
Slow-step file copy: Works about half the time with no errors. Other times there are one or two errors. These are always on sector 20 (first sector of directory track).

Jeff
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Re: Hard sector format

Post by Jeff » Mon Jun 04, 2018 7:17 pm

Ok. And what about http://hxc2001.com/vrac/HS/HxCUSBFE3.UPD + 1.hfe ?

snhirsch
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Re: Hard sector format

Post by snhirsch » Tue Jun 05, 2018 1:14 am

Jeff wrote:
Mon Jun 04, 2018 7:17 pm
Ok. And what about http://hxc2001.com/vrac/HS/HxCUSBFE3.UPD + 1.hfe ?
Fast Step:

Surface scan succeeds 10/10 times

Bulk file copy just as bad as previous attempt. At least 2-3 errors per file, all at the first sector of track

Slow Step:

Surface scan succeeds 9/10 times

Bulk file copy succeeds 4/10 times. Failed batches show 1-2 errors overall, all at sector 20 after seeking back to the directory.

Errors are all NO INDEX PULSE.

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Re: Hard sector format

Post by Jeff » Tue Jun 05, 2018 8:57 am

Ok. So the HxCUSBFE3.UPD + 6.hfe is the best one ?

EDIT: Please inform the SEBHC group that the actual firmware + software can already be used in read mode with the Heathkit machines.

snhirsch
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Re: Hard sector format

Post by snhirsch » Wed Jun 06, 2018 2:10 am

Jeff wrote:
Tue Jun 05, 2018 8:57 am
Ok. So the HxCUSBFE3.UPD + 6.hfe is the best one ?

EDIT: Please inform the SEBHC group that the actual firmware + software can already be used in read mode with the Heathkit machines.
Sorry for delay - busy day at work :-). I did a thorough re-check of 6.hfe with HxCUSBFE3.UPD and it does look like the best:

Slow Seek:

Surface scan passes 10/10 with no errors

Bulk file copy passes 5/10 with no errors. When errors occur, there are one or two and always NO INDEX PULSE at sector 20 (Track 2, Sector 0 - start of CP/M directory). Looks like seeking to the start of the disk is behaving differently from seeking inwards to read actual file data. Never see any errors on the data read.

Fast Seek:

Surface scan passes 10/10 with no errors

Bulk file copy is not usable at all. Throws multiple errors on every file. Sectors involved are somewhat random, but usually at the start of a track (multiple of 10).

If you can solve the multi-track step issue, I think it's there.

I'll let the Heath folks know. Any ETA on write support (I know I will get asked that :-))?

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Re: Hard sector format

Post by Jeff » Thu Jun 07, 2018 9:16 am

Before starting on the write support the read support must be working properly. And tbh i think that the write support will be a pain in the a*s, if not impossible, to make it working reliably for the on this hardware (the gotek)... I may be wrong but from my analysis and the tests results you gave me, the northstar appears to be intolerant to any index latency. This is the current issue with track change, and this is will even be worst when writing to the usb stick : flash writing will introduce additional delay. I can try to send fake indexes while preparing/writing to the flash, but i am not sure that the northstar can be fooled like this. In the hardware side what we need here is something able to store the whole image in RAM to avoid these flash latencies.

Anyway i will add the direct NSI file format support to the firmware. I think that this will help me to solve the last read issue, and maybe that the write support will be possible too. we will see :wink:

snhirsch
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Re: Hard sector format

Post by snhirsch » Thu Jun 07, 2018 1:47 pm

Jeff wrote:
Thu Jun 07, 2018 9:16 am
Before starting on the write support the read support must be working properly. And tbh i think that the write support will be a pain in the a*s, if not impossible, to make it working reliably for the on this hardware (the gotek)... I may be wrong but from my analysis and the tests results you gave me, the northstar appears to be intolerant to any index latency. This is the current issue with track change, and this is will even be worst when writing to the usb stick : flash writing will introduce additional delay. I can try to send fake indexes while preparing/writing to the flash, but i am not sure that the northstar can be fooled like this. In the hardware side what we need here is something able to store the whole image in RAM to avoid these flash latencies.

Anyway i will add the direct NSI file format support to the firmware. I think that this will help me to solve the last read issue, and maybe that the write support will be possible too. we will see :wink:
But it seems the Heath controller is far more tolerant, so perhaps write support for that will be simpler? I will keep my hopes up :-).

Would a schematic diagram of the Northstar floppy controller be of any help? When I was working with David Gesswein to get his MFM hard disk emulator working on the Northstar he had me capture a bunch of logic traces to see what the various signals in the HD controller were doing. Timing there was fussy as well, but we did eventually get reliable R/W support.

I would be glad to do this for the floppy controller if you can point out signals of interest. It might help confirm your thoughts about timing - or suggest that something else is to blame.

Let me know?

Jeff
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Re: Hard sector format

Post by Jeff » Sun Jun 10, 2018 10:37 pm

snhirsch wrote:
Thu Jun 07, 2018 1:47 pm
But it seems the Heath controller is far more tolerant, so perhaps write support for that will be simpler? I will keep my hopes up :-).
I hope so. i will anyway make a special firmware for both machines.

snhirsch
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Re: Hard sector format

Post by snhirsch » Wed Jun 13, 2018 4:39 pm

Jeff wrote:
Sun Jun 10, 2018 10:37 pm
snhirsch wrote:
Thu Jun 07, 2018 1:47 pm
But it seems the Heath controller is far more tolerant, so perhaps write support for that will be simpler? I will keep my hopes up :-).
I hope so. i will anyway make a special firmware for both machines.
A couple of technically-oriented Northstar users are planning to join the conversation. David Jones has disassembled the Advantage system ROM and may have some insights into how the sector timing sensitivity can be worked around.

djones60
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Re: Hard sector format

Post by djones60 » Wed Jun 13, 2018 5:17 pm

Yes, I've registered.

Here is a link to the disassembled ROM's. I still need to check it to make sure it's up to date with my local copy. FYI, I have a working NS Advantage and working on getting a bare bones NS Horizon going. Still need to test the motherboard and hope none of the other boards have developed a problem since I last used them. The floppy controller I have for it is a MDS-AD2.

https://github.com/djones60/North-Star-Advantage

dwight
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Re: Hard sector format

Post by dwight » Wed Jun 20, 2018 11:10 pm

Hi
I thought I might add some to things that might help. I also have a North Start Horizon with a MDC-AD3 controller. It is not fully functional yet as I'm just now bringing up the power supply capacitors ( takes a few days ).
Still, I've looked at the schematics and thought I'd add the following that might help.

1. There is a way to get some relief on timing. The way the missed sector hardware works is that it uses a counter. Since this is a hardware function, one should be able to take advantage of it.
The sector pulse to sector pulse ( leading edge, negative pulse ) can be 32.6 ms late and the index pulse can be a little less than half that late if needed ( by about 80 us ).

2. Most reads do not expect to get a clean read 100% of the time. This means a number of retries are allowed. I'm not sure what all the various software expects for the North Star DOS and for CP/M. Most software allows 3 read failures before errorring out. This means one can stall by corrupting the CS on sector read for a couple sector times. This hopefully gives enough delay.

3. I've been looking at how to solve the Index and Sector marks for my Nicolet 1080 ( I don't think you'd want to do this computer as I only know of 4 of these in the world and only one has been confirmed to be working ). Still this may help in relieving processor time while dealing with the USB. I plan on using two timers. On that normally puts the sector pulses out and the other mapped to another unused pin. I'd set both outputs to open drain and jump the two together before the buffers to the Gotek's pins. These can be left free running so that more time critical code, dealing with the data can be free to do other things.

These are just some of my thoughts.
Dwight

dwight
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Re: Hard sector format

Post by dwight » Wed Jun 20, 2018 11:18 pm

Hi
I should state #1. it can be late by 32.7 - 20 = 12.7 ms longer between pulses.

I should also note that the boot sector has no sector header other than the sync. I'm not sure how the other sectors look.
Another post said that the sectors have a sector header but that doesn't look to be true when looking at the boot code.
Dwight

snhirsch
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Re: Hard sector format

Post by snhirsch » Thu Jun 21, 2018 3:51 am

dwight wrote:
Wed Jun 20, 2018 11:18 pm
Hi
I should state #1. it can be late by 32.7 - 20 = 12.7 ms longer between pulses.

I should also note that the boot sector has no sector header other than the sync. I'm not sure how the other sectors look.
Another post said that the sectors have a sector header but that doesn't look to be true when looking at the boot code.
Dwight
True, there's no header in the sense that a Heath diskette (or soft-sector diskette) has one. Sectors on the NS are always written in their entirety.

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Re: Hard sector format

Post by Jeff » Thu Jun 21, 2018 7:31 am

Thanks for these timing data ! I suppose that the hardware timeout circuit is also enabled during write operations ?

dwight
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Re: Hard sector format

Post by dwight » Thu Jun 21, 2018 4:27 pm

It uses the same counter at the earlier stages to create the write data. One still needs the correct data timing for the data bits. The counter even flags the end of bytes for the processor to send the next byte. It is just 4 each four bit counters that restart on the sector pulses. The same counter is used to discriminate the main Index pulse. The clock for the counter is the 2 MHz divided from the 4 MHz crystal.
The counter overflow triggers the missing sector error.
When the sector pulse is detected, the counter is preloaded with 40H, rather than reset. So, it overflows on the 0FFC0H count, rather than the 10000H count. At 2 MHz, that would be 32.736ms. This means you should be able to delay the sector pulse by 12.736ms before having a missed sector pulse.

If my thinking is correct, it is better to send data with a bad CS than to miss a sector pulse or fail to send data, within the correct time.
Dwight

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